JEDA Technologies Overview
- Founded
-
2002

- Status
-
Out of Business
- Employees
-
24

- Latest Deal Type
-
Out of Business
JEDA Technologies General Information
Description
Provider of ESL design methodology intended to enable adoption and realize the benefits of ESL design methodology to build SoC products. The company's methodology offers values and benefits including early software development and testing, architecture exploration, optimization and synthesis at a higher level abstraction, enabling customers to build SoC products that are competitive, efficient and successful.
Contact Information
Website
www.jedatechnologies.net
Ownership Status
Out of Business
Financing Status
Formerly VC-backed
Primary Industry
Business/Productivity Software
Other Industries
Automation/Workflow Software
Primary Office
- 2900 Gordon Avenue
- Suite 100
- Santa Clara, CA 95051
- United States
+1 (408) 000-0000
JEDA Technologies Valuation & Funding
Deal Type | Date | Amount | Raised to Date | Post-Val | Status | Stage |
---|---|---|---|---|---|---|
3. Out of Business | 01-Jul-2019 | 00.000 | Completed | Out of Business | ||
2. Early Stage VC (Series B) | 22-Apr-2008 | 000 | 00.000 | 0000 | Completed | Startup |
1. Early Stage VC (Series A) | 22-Aug-2005 | $2.15M | $2.15M | 00.000 | Completed | Startup |
JEDA Technologies Cap Table
Stock | # of Shares Authorized |
Par Value | Dividend Rate ($) | Original Issue Price |
Liquidation | Liquidation Pref. Multiple |
Conversion Price | % Owned |
---|---|---|---|---|---|---|---|---|
Series B | 0,000,000 | 00.00 | 00.00 | 00.00 | 00 | 00.00 | 000 | |
Series A | 0,000,000 | 00.00 | 00.00 | 00.00 | 00 | 00.00 | 00.000 |
JEDA Technologies Patents
JEDA Technologies Recent Patent Activity
Publication ID | Patent Title | Status | First Filing Date | Technology (CPC) | Citations |
---|---|---|---|---|---|
US-20070136403-A1 | System and method for thread creation and memory management in an object-oriented programming environment | Inactive | 12-Dec-2005 | 000000000 | |
US-20060271345-A1 | Debugging a circuit using a circuit simulation verifier | Inactive | 18-May-2005 | 000000000 | 0 |